Dynamic swapping of memory bank base addresses

Details Dynamic swapping of memory bank base addresses Dynamic swapping of memory bank base addresses

2002-02-01

2004-09-14

Verbrugge, Kevin (Department: 2188)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

For multiple memory modules

C711S202000

Reexamination Certificate

active

06792499

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to microprocessor system and, more particularly, to a microprocessor system adapted to dynamically swap memory bank addresses and a method therefor.
2. Description of the Related Art
A microprocessor system includes both non-volatile, read only, memory banks, e.g., read only memory (ROM), and volatile, writable, memory banks, e.g., dynamic random access memory (DRAM). The ROM bank is typically placed at a memory map location that corresponds to the microprocessor's boot vector. That is, the microprocessor system executes from the ROM bank at boot up. In some cases, the microprocessor system requires this same memory location to be writable, e.g., when programs or interrupts are loaded dynamically, when debuggers require the program to be modifiable, or when the operating system is virtually addressed. This creates a situation during boot up where predetermined memory bank addresses are read only but must be writable immediately after boot up.
A solution to this problem is described in ARM® Limited's Reference Peripheral Specification, document number ARM DDI 0062D, issued May 1996. There, the DRAM bank is located in memory to coincide with the processor's boot vector. The ROM bank is located at an entirely separate memory location. At boot up, the ROM bank is aliased over the DRAM bank until the microprocessor can establish execution at another ROM location through jump or branch instructions. Continued boot up in the ROM bank might result in slower program execution since the ROM bank is typically slower than other forms of memory, e.g., the DRAM bank.
Accordingly, a need remains for a microprocessor system adapted to improve performance.


REFERENCES:
patent: 5619669 (1997-04-01), Katsuta
patent: 5624316 (1997-04-01), Roskowski et al.
patent: 5802544 (1998-09-01), Combs et al.
patent: 6070012 (2000-05-01), Eitner et al.
patent: 6601130 (2003-07-01), Silvkoff et al.

Affiliated with

Also associated with

Rating

Dynamic swapping of memory bank base addresses does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamic swapping of memory bank base addresses, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic swapping of memory bank base addresses will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3259597