Dynamic software accessibility to a microprocessor system...

Details Dynamic software accessibility to a microprocessor system... Dynamic software accessibility to a microprocessor system...

2005-05-24

2005-05-24

Verbrugge, Kevin (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Shared memory area

C711S165000, C711S205000

Reexamination Certificate

active

06898677

ABSTRACT:
A data processing system that includes a mode/reserve bit utilized to dynamically change a processor's operating mode between a virtual addressing mode and a real addressing mode. Each address block includes a reserve bit that indicates whether real or virtual addressing is desired, and the reserve bit is assigned a value by the software application executing on the processor. The value of the reserve bit is dynamically set and signals the processor which operating mode is required for the particular address block. The selection of virtual or real addressing mode is determined by the particular application that is being executed by the processor. When the particular application process seeks increased performance rather than protection, the virtual operating mode is selected, allowing the application process to send the effective addresses directly to the OS and hypervisor. This is accomplished by setting the reserve bit to the value for virtual addressing mode. When data protection is desired, the reserve bit is set to the value for real addressing mode, and the data address is sent to the (memory cloner's) TLB, where it is translated into a real address. The invention thus balances performance versus data protection.

REFERENCES:
patent: 5423013 (1995-06-01), Baum et al.
patent: 6128714 (2000-10-01), Onodera
patent: 6393540 (2002-05-01), Blumenau et al.
patent: 6529968 (2003-03-01), Anderson
patent: 6665783 (2003-12-01), Zahir
patent: 6813522 (2004-11-01), Schwarm et al.
patent: 20030153306 (2003-08-01), Study et al.

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