Dynamic sense amplifier for SRAM

Details Dynamic sense amplifier for SRAM Dynamic sense amplifier for SRAM

2007-12-25

2007-12-25

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S207000

Reexamination Certificate

active

11417805

ABSTRACT:
A dynamic sense amplifier for static random access memory (SRAM) is provided. The dynamic sense amplifier includes a pre-amplifier configured to amplify small input signals according to a first clock signal, and a main sense-latch coupled to the pre-amplifier, wherein the main sense-latch is configured to respond to the small input signals according to a second clock signal and a third clock signal, and wherein the dynamic sense amplifier is configured to consume substantially zero direct current power.

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Hong- Yi Huang et al., Self-Isolated Gain-Enhanced Sense Amplifier, VLSI/CAD Laboratory, Department of Electronic Engineering, Fu-Jen University and Integrated Circuits and Systems Laboratory, Institute of Electronics, National Chiao-Tung University, Taiwan.
Igor Arsovski, High-Speed Low-Power Sense Amplifier Design, ECE1352—Analog Electronics Reading Assignment, Nov. 12, 2001, pp. 1-14.

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