Dynamic semiconductor memory device with twisted bit-line struct

Details Dynamic semiconductor memory device with twisted bit-line struct Dynamic semiconductor memory device with twisted bit-line struct

1990-01-04

1992-09-01

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Noise suppression

365149, G11C 1100

Patent

active

051445832

ABSTRACT:
A dynamic random-access memory has bit-line pairs, word lines intersecting with the bit-line pairs, and memory cells arranged at the intersections of the bit-line pairs and the word lines, and sense amplifiers provided for the bit-line pairs, respectively. One of every two neighboring bit-line pairs is twisted at one portion, thus forming a twisted crossing section. The twisted crossing section is made of the parts of the gate electrodes of the transistors incorporated in the sense amplifier connected to the twisted bit-line pair. The bit-line pairs is twisted at a portion substantially middle with respect to the direction in which it extends, and the sensr amplifier associated with this bit-line pair is located at the twisted portion thereof.

REFERENCES:
patent: 4366559 (1982-12-01), Misaizu et al.
IEEE Journal of Solid-State Circuits, vol. 24, No. 1, Feb. 1989, pp. 21-27.
ISSCC 88, Digest of Technical Papers, pp. 238-239, Tsutomu Yamashita et al., Feb., 1988.

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