Dynamic semiconductor memory device with sense amplifiers as cac

Details Dynamic semiconductor memory device with sense amplifiers as cac Dynamic semiconductor memory device with sense amplifiers as cac

1995-10-27

1996-10-15

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Data refresh

36523003, G11C 800

Patent

active

055661181

ABSTRACT:
In a dynamic DRAM device including a plurality of memory cell blocks associated with sense amplifier arrays as cache memories, and registers for storing addresses of the memory cell blocks to indicate the contents of the sense amplifiers, a refresh address for a self-refresh mode is sequentially generated to perform a refresh operation upon the memoty cell blocks. When the refresh address coincides with a predetermined value, data of the memory cell blocks is read by using an address of one of the registers and is restored in a corresponding sense amplifer array.

REFERENCES:
patent: 5471430 (1995-11-01), Sawada et al.

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