Static information storage and retrieval – Read/write circuit
Patent
1991-09-04
1993-06-22
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
365203, 36523001, G11C 1140
Patent
active
052220427
ABSTRACT:
A dynamic semiconductor memory device capable of boosting a word line of a memory cell array higher than supply voltage, and methods of boosting the level of the word line are disclosed. The dynamic RAM of the present invention includes a RAS (Row Address Strobe) buffer, an address buffer, a write buffer, a word line driving signal generating circuit, a first word line boost circuit and a second word line boost circuit. The word line driving signal generating circuit boosts the word line to the supply voltage in response to a row address strobe signal from the RAS buffer. The first word line boost circuit boosts the word line to be higher than the supply voltage. The second word line boost circuit again boosts the word line in response to a write enable signal from the write buffer. In this manner, unsuccessful writing due to leakage of capacitance can be suppressed.
REFERENCES:
patent: 4649523 (1987-03-01), Holder, Jr. et al.
patent: 4933907 (1990-06-01), Kumanoya et al.
patent: 4953127 (1990-08-01), Nagahashi et al.
Fears Terrell W.
Mitsubishi Denki & Kabushiki Kaisha
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