Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent
1997-05-12
1999-08-03
Auve, Glenn A.
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
710 36, 710108, 710110, 710107, 710126, 710128, 710129, 710130, 711147, 711167, G06F 1314
Patent
active
059319321
ABSTRACT:
A method and apparatus to prevent data from being corrupted prior to reaching the final destination is provided. The method and apparatus monitors the status of posted write transactions and transaction initiations. If it is determined that a posted write transaction is incomplete and there is a pending transaction initiation, a bus retry is requested for the pending transaction.
REFERENCES:
patent: 5519872 (1996-05-01), Khandekar
patent: 5627970 (1997-05-01), Keshav
patent: 5659709 (1997-08-01), Quach
Auve Glenn A.
Cirrus Logic Inc.
Jean Frantz Blanchard
Nguyen Frank D.
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