Dynamic reordering of memory requests

Details Dynamic reordering of memory requests Dynamic reordering of memory requests

2006-12-26

2006-12-26

Moazzami, Nasser (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711S151000, C711S206000, C710S036000

Reexamination Certificate

active

07155582

ABSTRACT:
An arbitrator (24) is disclosed for reordering access requests (25) to a memory system (150) to reduce memory system conflicts. The arbitrator comprises a transaction buffer (203) for buffering the access requests (25), an output counter (207) for counting access requests issued by the arbitrator (24), a mapping table (211) for mapping at least the output counter (207) to the access requests (25) in the transaction buffer (203), and a reordering unit (225) for dynamically re-ordering entries in the mapping table (211) such that the mapping points to the access requests (25) in an issue order wherein memory system conflicts are reduced.

REFERENCES:
patent: 6212611 (2001-04-01), Nizar et al.
patent: 6510474 (2003-01-01), Stracovsky et al.
patent: 6580712 (2003-06-01), Jennings et al.

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