Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2006-08-01
2006-08-01
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C714S006130
Reexamination Certificate
active
07085907
ABSTRACT:
A data storage control unit is coupled to one or more host devices and to one or more physical storage units, the storage control unit configured as a plurality of clusters. Each cluster includes cache memory and often non-volatile storage (NVS). The storage control unit receives and processes write requests from the host devices and directs that data updates be temporarily stored in the cache in one cluster and copied to the NVS of the other cluster. The data updates are subsequently destaged to the logical ranks associated with each cluster. During an initial microcode load (IML) of the storage controller, space in the cache and NVS of each cluster is allocated to buffers with the remaining cache and NVS space being allocated to customer data. After an IML has been completed, the size of the buffers become fixed and no further buffer allocation may occur. Method, apparatus and program product are provided by which a data storage controller dynamically reconfigures NVS and cache memory in multiple clusters, particularly when it is desired to change the size of the NVS and cache of either or both clusters.
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Iyer and Wolf (1991) IBM Technical Disclosure Bulletin 33:169.
Ash Kevin J.
Grossman Richard H.
Ohrazda Joseph D.
Rodriguez Pablo A.
Vande Zande Tim S.
Law Office of Dan Shifrin, PC
Moazzami Nasser
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