Dynamic random access memory with low noise characteristics

Details Dynamic random access memory with low noise characteristics Dynamic random access memory with low noise characteristics

1991-03-05

1994-02-22

Mottola, Steven

Static information storage and retrieval

Read/write circuit

Noise suppression

3652256, G11C 702

Patent

active

052894215

ABSTRACT:
A dynamic random access memory (DRAM) with low noise characteristics comprises a plurality of memory cells each consisting of a pair of reference memory cells respectively arranged between a word line and a pair of adjacent bit lines. The reference memory cells store signals of opposite levels corresponding to one bit of information. Each of the reference memory cells consists of a capacitor and switching transistor. One end of the capacitor is connected to the collector of the transistor. The other end of the capacitor is connected to one of the pair of bit lines adjacent thereto. The base of the transistor is connected to the word line, and the emitter of the transistor is completed to receive a reference voltage.

REFERENCES:
patent: 4625300 (1986-11-01), McElroy
patent: 5062079 (1991-10-01), Tsuchida et al.

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