Dynamic random access memory with improved sensing and refreshin

Static information storage and retrieval – Read/write circuit – Differential sensing

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365149, G11C 700

Patent

active

049911422

ABSTRACT:
The present invention uses two pairs of cross coupled n-channel sense amplifier transistors attached between two electrically balanced halves of a bit line. Disposed between each pair of cross coupled n-channel sense amplifier transistors is only one pair of p-channel restore transistors attached between the bit line and complement bit line. Furthermore, on the bit line and complement bit line, between one pair of cross coupled n-channel sense amplifier transistors and the pair of p-channel restore transistors, are depletion type isolating transistors that further isolate halves of the bit line and complement bit line.

REFERENCES:
patent: 4658877 (1987-04-01), McElroy
patent: 4811802 (1989-03-01), Koishi
patent: 4816706 (1989-03-01), Dhong et al.
patent: 4819207 (1989-04-01), Sakui et al.
patent: 4819209 (1989-04-01), Takemae et al.
patent: 4825417 (1989-04-01), Seo

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