Dynamic random access memory with enhanced sense-amplifier circu

Details Dynamic random access memory with enhanced sense-amplifier circu Dynamic random access memory with enhanced sense-amplifier circu

1990-06-12

1992-01-28

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Accelerating charge or discharge

365203, G11C 1300

Patent

active

050848429

ABSTRACT:
A dynamic random access memory has a substrate, plural pairs of parallel bit lines provided on the substrate, parallel word lines insulatively crossing the parallel bit lines to define cross points therebetween, and memory cells provided at the cross points. Each memory cell has a data storage capacitor and a transistor. Sense amplifiers are provided at bit line pairs, respectively, to sense a data voltage. A discharge control section, which is associated with the sense amplifiers, forms discharge paths branched between the bit line pairs and the substrate grounded to progress the discharging of charges, when a certain word line is designated and a memory cell is selected from those memory cells which are connected to the certain word line, whereby the operational speed of the memory is increased.

REFERENCES:
patent: 4803664 (1989-02-01), Itoh
Symposium on VLSI Circuits, digest of Tech. papers, P-113-114, May 1989, Daeie Chin et al, "An Experimental 16 Mb DRAM with Reduced Peak-Current Noise".
Symposium on VLSI Circuits, digest of Tech. papers P-103-103, May 1989, J. Okamura et al.; "Decoded-Source Sense Amplifier for High-Density DRAMs".

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