Dynamic random access memory with enhanced sense-amplifier circu

Details Dynamic random access memory with enhanced sense-amplifier circu Dynamic random access memory with enhanced sense-amplifier circu

1991-10-24

1993-06-22

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Accelerating charge or discharge

365203, 36523001, G11C 1300

Patent

active

052220389

ABSTRACT:
A dynamic random-access memory includes a plurality of spaced-apart memory cell blocks each of said memory cell blocks including rows and columns of memory cells arranged in a matrix on a substrate. Bit lines and word lines are connected to the rows and columns of memory cells in each cell block. PMOS sense amplifier sections and NMOS sense amplifier sections are associated with the memory cell blocks respectively. PMOS driver transistors for the PMOS sense amplifier sections are distributed among the PMOS sense amplifier sections such that a PMOS transistor is located between every two neighboring PMOS sense amplifier sections. NMOS driver transistors for the NMOS sense amplifier sections are distributed among the NMOS sense amplifier sections such that a NMOS transistor is located between every two neighboring NMOS sense amplifier sections. Source voltage supply lines extend in a corresponding word-line snap region between two neighboring cell blocks, and are connected to the PMOS and NMOS driver transistors, for supplying these transistors with a first and a second source voltage independently of each other.

REFERENCES:
patent: 4803664 (1989-02-01), Itoh
patent: 5084842 (1992-01-01), Tsuchida et al.

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