Dynamic random access memory having sense amplifier circuits and

Static information storage and retrieval – Read/write circuit – Data refresh

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307DIG3, 307DIG4, 365205, G11C 700

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041225490

ABSTRACT:
A dynamic Random Access Memory having dummy cells and sense amplifier circuits. The sense amplifier circuits consist of a flip-flop circuit with two nodes and a voltage setting circuit. The potential of the ground terminal of the flip-flop circuits is controlled by the voltage setting circuit, whereby when the magnitude of the read-out voltages of the dummy cell and a selected memory cell are being sensed and amplified by the flip-flop circuit, only the charge of that node at which the read-out voltage is lower is discharged at the ground terminal, and the signal level of that data line in which the voltage is higher is kept unchanged.
A "1" voltage regeneration circuit is connected to the data line for maintaining a more accurate "1" voltage, permitting speeding up of reading out and writing in.

REFERENCES:
patent: 3699539 (1972-10-01), Spence
patent: 3810124 (1974-05-01), Hoffman et al.
patent: 3940747 (1976-02-01), Kuo et al.
patent: 3949381 (1976-04-01), Dennard et al.
patent: 4000413 (1976-12-01), Wong et al.
patent: 4010453 (1977-03-01), Lewis
patent: 4039861 (1977-08-01), Heller et al.
Heller et al., "High Sensitivity Charge-Transfer Sense Amplifier", IEEE Journal, vol. 5c-11, No. 5, Oct. 1976, pp. 596-601.

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