Dynamic random access memory having self-test function

Static information storage and retrieval – Read/write circuit – Testing

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36518901, G11C 1134

Patent

active

056403542

ABSTRACT:
An improved DRAM having a self-test function capable of performing a self-test function in a fast page mode in accordance with a transition of a column address in accordance with an interior clock signal without a toggle of a column address strobe signal, which includes an entry/exit control unit for generating a self-test entry signal in accordance with a combination a predetermined address signal and an external synchronous signal; a signal transition detection unit for detecting a transition of a self-test entry signal and a word line enable signal and for outputting a transition detection signal; a counter for counting an interior clock signal outputted in accordance with a transition detection signal; a data generating and comparison unit for writing and reading a test data without a toggle of the external synchronous signal comparing the read test data with the generated test data; and an error and end detection unit for generating an error flag and end flag.

REFERENCES:
patent: 5262984 (1993-11-01), Noguchi et al.

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