Dynamic random access memory having folded bit line-shared sense

Details Dynamic random access memory having folded bit line-shared sense Dynamic random access memory having folded bit line-shared sense

1988-12-20

1990-04-10

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Differential sensing

365203, 365210, 36518904, 36523001, G11C 1300

Patent

active

049166670

ABSTRACT:
A folded line DRAM having shared sense amplifiers wherein one of two the memory cell arrays is provided with a pair of switches for dividing the bit line pairs into plural bit line pair groups and the second memory cell array is provided with separate switches connected in series the bit line pairs for the purpose of reducing power consumption caused by charging and discharging of the bit lines during accessing.

REFERENCES:
patent: 4366559 (1982-12-01), Misaizu et al.
patent: 4545037 (1985-10-01), Nakano et al.
patent: 4546457 (1985-10-01), Nozaki et al.
patent: 4606010 (1986-08-01), Saito
patent: 4736343 (1988-04-01), Hidaka et al.
patent: 4739500 (1988-04-01), Miyamoto et al.
patent: 4803663 (1989-02-01), Miyamoto et al.

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