Dynamic random access memory having continuous data line equaliz

Details Dynamic random access memory having continuous data line equaliz Dynamic random access memory having continuous data line equaliz

1993-11-12

2000-08-22

Lane, Jack A.

Static information storage and retrieval

Read/write circuit

Complementing/balancing

365203, 365205, 365207, 3652335, G11C 706, G11C 11407

Patent

active

061082546

ABSTRACT:
A Dynamic Random Access Memory (DRAM) in which a data input/output buffer is connected between first data lines and second data lines. An equalizing circuit and a data latch circuit are connected to the second data lines. The equalizing circuit maintains the second data lines in reset condition, during normal operation. It temporarily releases the second data lines from the reset condition, in response to an output from an address-transition detecting circuit, thereby to transfer the data from the data input/output buffer. The data latch circuit latches the data transferred to the second data lines, in response to the output from the address-transition detecting circuit.

REFERENCES:
patent: 4616342 (1986-10-01), Miyamoto
patent: 4811295 (1989-03-01), Shinoda
patent: 4870617 (1989-09-01), Nakano et al.
patent: 4881203 (1989-11-01), Watanabe et al.
patent: 4891792 (1990-01-01), Hanamura et al.
patent: 4894803 (1990-01-01), Aizaki
patent: 4922461 (1990-05-01), Hayakawa et al.
patent: 5146247 (1992-09-01), Sasaki et al.
ISSCC 84/Thursday, Feb. 23, 1984/Continental Ballrooms 5-9/3:45 P.M.;Session XV: Static RAMs; Osamu Minato et al; 1984 IEEE International Solid-State Circuits Conference; pp. 222-223.

Affiliated with

Also associated with

Rating

Dynamic random access memory having continuous data line equaliz does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamic random access memory having continuous data line equaliz, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic random access memory having continuous data line equaliz will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-588669