Dynamic random access memory having bit lines buried in semicond

Details Dynamic random access memory having bit lines buried in semicond Dynamic random access memory having bit lines buried in semicond

1993-02-22

1995-04-25

Larkins, William D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257306, 257621, 257305, H01L 27108

Patent

active

054101697

ABSTRACT:
There is provided a DRAM memory cell structure. The semiconductor structure includes a semiconductor substrate of a first conductivity type having a main surface, source and drain regions of a second conductivity type formed in the main surface area of the semiconductor substrate, word lines extending in a first plane direction and formed on those portions of the semiconductor substrate which respectively lie between the source and drain regions, capacitors each having one of the source and drain regions as a storage node electrode, and bit lines buried in the semiconductor substrate and electrically connected to the source or drain regions, respectively.

REFERENCES:
patent: 4811067 (1989-03-01), Fitzgerald et al.
patent: 4912535 (1990-03-01), Okumura

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