Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2007-09-25
2007-09-25
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S206000, C365S190000, C365S149000, C365S051000, C365S072000, C365S230030, C365S230060
Reexamination Certificate
active
11198357
ABSTRACT:
A dynamic RAM incorporates a plurality of dynamic memory cells, each of which comprises a MOSFET having a gate set as a select terminal, one source and drain set as input/output terminals, and the other source and drain connected to storage nodes of a capacitor, a plurality of word lines respectively connected to the select terminals of the plurality of dynamic memory cells, a plurality of complementary bit line pairs respectively connected to the input/output terminals of the plurality of dynamic memory cells, and a sense amplifier array comprising a plurality of latch circuits which respectively amplify differences in voltage between the complementary bit line pairs placed so as to extend in directions opposite to each other from each pair of input/output terminals. Power supply lines are provided in mesh form inclusive of a portion above word drivers.
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Kajigaya Kazuhiko
Kimura Katsutaka
Nakamura Yoshitaka
Sekiguchi Tomonori
Takahashi Tsugio
A. Marquez, Esq. Juan Carlos
Elpida Memory Inc.
Fisher Esq. Stanley P.
Tran Andrew Q.
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