Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1993-11-26
1994-11-01
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Bad bit
36523006, 371 101, G11C 700, G11C 1300
Patent
active
053612310
ABSTRACT:
A dynamic random access memory device has a plurality of sense amplifier circuits shared between two regular memory cell arrays respectively associated with redundant memory cell arrays, and two transfer gate arrays are coupled between one of the regular memory cell arrays and one of the redundant memory cell arrays as well as between the other regular memory cell array and the other redundant memory cell array so that a large number of defective memory cells are replaceable with both of the redundant memory cell arrays, thereby improving production yield.
REFERENCES:
patent: 5008857 (1991-04-01), Mizoguchi
NEC Corporation
Yoo Do Hyun
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