Static information storage and retrieval – Read/write circuit – Testing
Patent
1993-04-27
1994-05-24
LaRoche, Eugene R.
Static information storage and retrieval
Read/write circuit
Testing
371 211, G11C 2900
Patent
active
053155548
ABSTRACT:
When a dynamic random access memory device is powered with an external power voltage, a first intermediate voltage generator produces an intermediate voltage from the external power voltage for supplying to the counter electrodes of the storage capacitors of memory cells and a precharge unit, and the first intermediate voltage generator is replaced with a second intermediate voltage generator after the internal power voltage becomes stable, wherein a switch transistor blocks the counter electrodes and the precharge unit from the second intermediate voltage generator during a test operation on bit lines, thereby effectively screening out defective products.
REFERENCES:
patent: 4459686 (1984-07-01), Toyoda
patent: 5051995 (1991-09-01), Tobita
patent: 5079744 (1992-01-01), Tobita et al.
patent: 5157629 (1992-10-01), Sato et al.
patent: 5208777 (1993-05-01), Shibata
Dinh Son
LaRoche Eugene R.
NEC Corporation
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