Dynamic random access memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S296000, C257SE21652

Reexamination Certificate

active

07394124

ABSTRACT:
A dynamic random access memory (DRAM) is provided. The dynamic random access memory includes a deep trench capacitor disposed in a first trench of a substrate, a conductive layer disposed in a second trench of the substrate, a gate structure, and a conductive layer disposed on the surface of the substrate at two sides of the gate structure. The depth of the second trench is smaller than the depth of the first trench, and the second trench partially overlaps with the first trench. The conductive layer disposed in the second trench is electrically connected with the conductive layer of the deep trench capacitor. The gate structure is disposed on the substrate. The conductive layer at one side of the gate structure is electrically connected with the conductive layer disposed in the second trench.

REFERENCES:
patent: 5998821 (1999-12-01), Hieda et al.
patent: 6312982 (2001-11-01), Takato et al.
patent: 6373085 (2002-04-01), Hieda
patent: 6417063 (2002-07-01), Petter et al.
patent: 6664167 (2003-12-01), Temmler et al.
patent: 2005/0145913 (2005-07-01), Katsumata et al.
patent: 2007/0082444 (2007-04-01), Chien

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