Dynamic random access memory cell with increased signal margin

Static information storage and retrieval – Systems using particular element – Capacitors

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Details

G11C 1140, G11C 1124

Patent

active

044919360

ABSTRACT:
A dynamic random access memory cell (30) includes an access transistor (32) having the gate terminal thereof connected to a word line (34) and the source and drain terminals thereof connected between a bit line (36) and a node (37). A charge storage capacitor (38) is connected between the node (37) and a decoded plate line (40). The plate line (40) receives a bi-level voltage which shifts levels in a timing sequence keyed to the word line (34) signal. Shifting of voltage levels provided to the capacitor (38) through the plate line (40) essentially doubles the signal margin of the memory circuit (30) to thereby enhance the reliability of the data stored in the memory circuit (30).

REFERENCES:
patent: 4409672 (1983-10-01), Takemae

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