Dynamic random access memory cell having increased capacitance

Details Dynamic random access memory cell having increased capacitance Dynamic random access memory cell having increased capacitance

1997-01-31

1997-12-23

Nelms, David C.

Static information storage and retrieval

Systems using particular element

Capacitors

257306, 257309, H01L 27108

Patent

active

057012644

ABSTRACT:
A dynamic random access memory cell and method of fabrication thereof are disclosed. An access transistor (10) is formed in a substrate (12). The deposition of a first dielectric layer (20) follows. A plurality of conductive layers (22-30) are deposited, with alternating layers (24 and 28) having a higher dopant concentration than the other layers (22, 26 and 30). A contact hole (32) is etched through the conductive layers (22-30) and the first dielectric layer (20) to the substrate (12). A contact layer (36) is then deposited, making contact with the substrate (12) and each conductive layer (22-30). The conductive layers (22-30) and contact layer (36) are patterned with an isotropic etch selective to the higher doped layers (24 and 28). The resulting structure is a conductive member (42) with a peripheral side surface (44) having inset furrows (40) formed by the selective etching of the higher doped layers (24 and 28). A conformal capacitor dielectric (46) is formed over the conductive structure (42). A conductive plate layer (46) is formed over the capacitor dielectric (46).

REFERENCES:
patent: 5053351 (1991-10-01), Fazan et al.
patent: 5434812 (1995-07-01), Tseng
patent: 5504704 (1996-04-01), Sato
Ema et al., "3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMs", IEDM, pp. 592-595, 1988.

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