Dynamic random access memory and communications terminal...

Details Dynamic random access memory and communications terminal... Dynamic random access memory and communications terminal...

2006-07-07

2008-12-02

Le, Vu A (Department: 2824)

Static information storage and retrieval

Powering

C365S229000

Reexamination Certificate

active

07460428

ABSTRACT:
Provided is a DRAM having reduced current consumption and a communication terminal including the same. The DRAM includes a plurality of memory banks capable of being independently supplied with power, and a DPD controller for selectively causing some of the plurality of memory banks to enter a DPD mode.

REFERENCES:
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patent: 2002/0159322 (2002-10-01), Choi et al.
patent: 2002/0191467 (2002-12-01), Matsumoto et al.
patent: 2005/0281112 (2005-12-01), Ito et al.
patent: 2001-338489 (2001-12-01), None
patent: 10-1998-0013997 (1998-05-01), None
patent: 100173953 (1998-11-01), None
patent: 1020040044421 (2004-05-01), None

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