Dynamic random access memory

Details Dynamic random access memory Dynamic random access memory

1991-12-26

1994-01-25

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Noise suppression

36518901, 365201, G11C 702

Patent

active

052821676

ABSTRACT:
A DRAM according to the invention has noise-eliminating circuits. Each of the circuits has an output side thereof connected to a corresponding word line. At the time of a voltage stress examination, each of the circuits is controlled to be in an on-state thereby transmitting a voltage stress, input an input side thereof, to the word line. At the time of normal operation, the input side of the circuit is connected to an earth node, and each of the circuits is turned on and off in accordance with a signal output from a corresponding one of word line-selecting circuits or with the level of a corresponding one of the word lines.

REFERENCES:
patent: 4168490 (1979-09-01), Stinehelfer
patent: 4602355 (1986-07-01), Watanabe
patent: 4610002 (1986-09-01), Kaneko
patent: 4943949 (1990-07-01), Yamaguchi et al.
patent: 4980862 (1990-12-01), Foss

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