Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-05-21
1999-12-07
Saadat, Mahshid
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257296, 257305, H01L 27108, H01L 2976, H01L 2994, H01L 31119
Patent
active
059988215
ABSTRACT:
A dynamic RAM structure comprises a trench formed on a p-type Si substrate, a capacitor oxide film formed in such a manner as to cover an inner wall of the trench, a polysilicon film being a capacitor storage node electrode for burying the trench covered with the capacitor oxide film, an epitaxial Si layer formed on the Si substrate including an upper portion of the polysilicon film, a source/drain layer of a MOS transistor formed in the epitaxial Si layer, and a surface strap diffusion layer formed in the epitaxial Si layer in such a manner as to come in contact with the source/drain layer.
REFERENCES:
patent: 4763181 (1988-08-01), Tasch, Jr.
patent: 4784969 (1988-11-01), Nitayama
patent: 4792834 (1988-12-01), Uchida
patent: 4794434 (1988-12-01), Pelley, III
patent: 5006910 (1991-04-01), Taguchi
patent: 5012308 (1991-04-01), Hieda
patent: 5065273 (1991-11-01), Rajeevakumar
patent: 5097381 (1992-03-01), Vo
patent: 5119155 (1992-06-01), Hieda et al.
patent: 5168366 (1992-12-01), Sasaki
patent: 5170243 (1992-12-01), Dhong et al.
patent: 5170372 (1992-12-01), Wong
patent: 5187566 (1993-02-01), Yoshikawa et al.
patent: 5200354 (1993-04-01), Om et al.
patent: 5250829 (1993-10-01), Bronner et al.
patent: 5309008 (1994-05-01), Watanabe
patent: 5315543 (1994-05-01), Matsuo et al.
patent: 5349218 (1994-09-01), Tadaki et al.
patent: 5362663 (1994-11-01), Bronner et al.
patent: 5363327 (1994-11-01), Henkles et al.
patent: 5372966 (1994-12-01), Kohyama
patent: 5414285 (1995-05-01), Nishihara
patent: 5432365 (1995-07-01), Chin et al.
patent: 5442211 (1995-08-01), Kita
patent: 5508541 (1996-04-01), Hieda et al.
patent: 5512767 (1996-04-01), Noble, Jr.
patent: 5528062 (1996-06-01), Hsieh et al.
1995 Symposium on VLSI Technology Digest of Technical Papers, pp. 137-138, "0.29 um.sup.2 Trench Cell Technologies for 1G-bit DRAMs with Open/Folded-Bit-Line Layout and Selective Growth Technique," M. Noguchi et al, et al. (1995).
Hieda Katsuhiko
Nitayama Akihiro
Fenty Jesse A.
Kabushiki Kaisha Toshiba
Saadat Mahshid
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