Dynamic RAM and method of manufacturing the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257305, 257303, 257506, H01L 27108

Patent

active

055593500

ABSTRACT:
A dynamic RAM array comprises a substrate, a plurality of semiconductor island regions and a trench region formed on the substrate, each island region being surrounded by the trench region, and the trench region having wider trench portions and narrower trench portions, an insulating layer formed on the trench region, capacitors refilled in the wider trench portions, each capacitor having a plate electrode, a capacitor insulating layer and a storage node electrode, refilled layers formed in the narrower trench portion, for forming field isolation regions, MOS transistors formed on the island region, each MOS transistor having a source, a drain and a gate as word line, one of the source and drain being coupled with the storage node electrode, and bit lines perpendicular to the word line, being coupled with the other of the source and drain.

REFERENCES:
patent: 4860070 (1989-08-01), Arimoto et al.

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