Static information storage and retrieval – Read/write circuit – Simultaneous operations
Patent
1987-12-17
1990-08-07
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Simultaneous operations
365207, 365221, G11C 1300
Patent
active
049473735
ABSTRACT:
A semiconductor memory is provided with a first memory cell group, a second memory cell group, a first register for a serial output operation for holding information related to the first memory cell group, a second register for a serial output operation for holding information related to the second memory cell group, and transfer means for transferring information related to either the first or second memory cell group to either the first or second serial output register. By virtue of this arrangement, while the information transferred to the first serial output register is being serially output therefrom, information can simultaneously be transferred to the second serial output register by the transfer means.
REFERENCES:
patent: 4322635 (1982-03-01), Redwine
patent: 4367540 (1983-01-01), Shimohigashi
patent: 4429375 (1984-01-01), Kobayashi et al.
patent: 4586166 (1986-04-01), Shaw
patent: 4667313 (1987-05-01), Pinkham et al.
Kawaguchi Hitoshi
Mitake Jun
Morino Makoto
Nagashima Osamu
Okada Terutaka
Fears Terrell W.
Hitachi , Ltd.
Hitachi VLSI Engineering Corp.
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