Dynamic queuing for read/write requests

Details Dynamic queuing for read/write requests Dynamic queuing for read/write requests

2001-02-05

2004-01-13

Elamin, Abdelmoniem (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

C711S150000, C711S162000

Reexamination Certificate

active

06678758

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to computer networking, and more particularly, to the dynamic buffering of read and write requests over a computer network.
2. Description of the Related Art
In a computer network, remote read and write requests are sent via a network router from input/output (I/O) devices to processors at various nodes. A node may be configured as a host processor in which case the I/O devices will be connected to a central processing unit (CPU). A node may alternatively be unintelligent with the I/O devices simply connected to a bus. Each read or write request is addressed to a particular node and each node has a unique amount of traffic at any given time. As a result, some nodes will have a greater latency period than others. If requests for all of the nodes are using the same buffer, then monopolization of the buffer by a slow node can increase the latency time for requests to fast nodes because there will be no remaining buffer space for any requests other than those to the slow node.
Similarly, if the queuing system is a first-in-first-out (FIFO) system, then one request for a slow node could increase the latency time for all subsequent requests even if those requests are for substantially faster nodes.
One method for decreasing latency time is to use context switching. Context switching, however, requires the use of complex logic and large amounts of memory to store the contexts.
Thus, there is a need for a system of buffering read/write requests in a manner that minimizes the latency for each request. The buffering system allows for dynamic queuing such that requests for fast nodes are not affected by requests for slow nodes.
SUMMARY OF THE INVENTION
The present invention includes a PCI (peripheral component interconnect) network adaptor that manages read/write requests through the establishment of dynamic queues. The PCI network adaptor establishes a unique queue for each destination node that enables the requests for each node to be processed separately. This separate processing minimizes the latency time for requests by processing requests for fast destination nodes without delaying for slow destination nodes.
In one embodiment of the invention, a system includes a network router coupled to two or more PCI network adaptors. Each PCI network adaptor is coupled to a PCI bus and each PCI bus is coupled to one or more devices. The devices communicate remotely with each other using PCI protocols. The devices send read/write requests to various destination addresses via the PCI network adaptor. The PCI network adaptor determines whether each read/write request should be added to the linked list for the destination node of the request or whether the request should be rejected. The PCI network adaptor determines this based on various latency factors associated with the destination node. For instance, if the number of pending requests for the destination node is below a predetermined threshold and the entire buffer is not full, then the request is added to the linked list for the destination node. Otherwise, the request is rejected. For write requests, if the request is added to the linked list for the destination node, then any pending read requests for that node are aborted. Aborting read requests prevents the accessing of data before it has been updated by a pending write request.


REFERENCES:
patent: 5970064 (1999-10-01), Clark et al.
patent: 6260125 (2001-07-01), McDowell
patent: 6366968 (2002-04-01), Hunsaker
patent: 6487615 (2002-11-01), Hunsaker
patent: 6487643 (2002-11-01), Khare et al.
U.S. patent application Ser. No. 09/953,153, Sugahara et al., filed Aug. 31, 2000.

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