Dynamic processor reconfiguration for low power without...

Details Dynamic processor reconfiguration for low power without... Dynamic processor reconfiguration for low power without...

2011-06-14

2011-06-14

Patel, Nitin C (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

C713S324000

Reexamination Certificate

active

07962770

ABSTRACT:
A method, system and program are provided for dynamically reconfiguring a pipelined processor to operate with reduced power consumption without reducing existing performance. By monitoring or detecting the performance of individual units or stages in the processor as they execute a given workload, each stage may use high-performance circuitry until such time as a drop in the throughput performance is detected, at which point the stages are reconfigured to use lower-performance circuitry so as to meet the reduced performance throughput requirements using less power. By configuring the processor to back off from high-performance designs to low-performance designs to meet the detected performance characteristics of the executing workload warrant, power dissipation may be optimized.

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