Electrical computers and digital processing systems: support – Computer power control – Power conservation
Reexamination Certificate
2008-07-15
2008-07-15
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Computer power control
Power conservation
C713S300000, C713S322000, C713S324000
Reexamination Certificate
active
11236657
ABSTRACT:
A pipeline stage's stall detection logic detects a stall condition, and sends a signal to idle detection logic to gate off the pipeline's register clocks. The stall detection logic also monitors a downstream pipeline stage's stall condition, and instructs the idle detection logic to gate off the pipeline stage's registers when the downstream pipeline stage is in a stall condition as well. In addition, when the pipeline stage's stall detection logic detects a stall condition, either from the downstream pipeline stage or from its own pipeline units, the pipeline stage's stall detection logic informs an upstream pipeline stage to gate off its clocks and thus, conserve more power.
REFERENCES:
patent: 5203003 (1993-04-01), Donner
patent: 5918042 (1999-06-01), Furber
patent: 6247134 (2001-06-01), Sproch et al.
patent: 6513057 (2003-01-01), McCrory
patent: 6609209 (2003-08-01), Tiwari et al.
patent: 6611920 (2003-08-01), Fletcher et al.
patent: 6636976 (2003-10-01), Grochowski et al.
patent: 6906554 (2005-06-01), Chen
patent: 6948050 (2005-09-01), Gove et al.
patent: 7266708 (2007-09-01), Miller
patent: 2002/0138777 (2002-09-01), Feierbach
patent: 2004/0068640 (2004-04-01), Jacobson et al.
Abernathy Christopher Michael
DeMent Jonathan James
Hall Ronald
Philhower Robert Alan
Shippy David
Rifai D'Ann N.
VanLeeuwen & VanLeeuwen
LandOfFree
Dynamic power management in a processor design does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dynamic power management in a processor design, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic power management in a processor design will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3949063