Dynamic peripheral control of I/O buffers in peripherals with mo

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

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Details

710 52, 710 12, 710 13, 710 17, 710 18, 710 19, 709212, 709213, G06F 1300

Patent

active

060386215

ABSTRACT:
A peripheral system includes (a) a peripheral device having peripheral memory located thereon, (b) at least one input/output (I/O) card communicating with the peripheral device, and (c) a means for managing the peripheral memory between the peripheral device and the at least one I/O card. In a preferred embodiment, the means for managing the peripheral memory includes (a) a means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) a means for allocating, during normal operation, the optimum amount of peripheral memory to each I/O card. A preferred method for managing memory, between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card, includes (a) determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) allocating, during normal operation, the optimum amount of peripheral memory to each I/O card.

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