Static information storage and retrieval – Read/write circuit – Accelerating charge or discharge
Patent
1996-08-30
1998-09-08
Nguyen, Viet Q.
Static information storage and retrieval
Read/write circuit
Accelerating charge or discharge
365203, 365222, G11C 1140, G11C 702
Patent
active
058055169
ABSTRACT:
A memory cell (400) for storing data on an integrated circuit. The memory cell (400) is dynamic, nonvolatile, and reprogrammable. The layout of the memory cell is compact. A logic high output from the memory cell (400) is about VDD and a logic low output is about VSS. The memory cell (400) of the present invention includes a first programmable memory element (515). First programmable memory element (515) is coupled between a voltage source (510) and an output node (405). A charge pumping node (545) dynamically charges, through a charging transistor (525), the output node (405) to about VDD. When programmable memory element (515) is not programmed, the memory cell stores and outputs a logic low. When programmable memory element (515) is programmed, the memory cell stores and outputs a logic high. The memory cell (400) may be used to store the configuration information for a programmable logic device (121).
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Altera Corporation
Nguyen Viet Q.
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