Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1985-09-03
1987-01-13
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Data refresh
365203, G11C 700
Patent
active
046369899
ABSTRACT:
A dynamic random access memory, which is accessed in response to an address strobe signal, has an automatic refresh circuit which consists of a clock generator that generates refresh clock pulses when the address strobe signal is not produced, and an address counter that increments a refresh address by counting the refresh clock pulses. Information retained in memory cells is automatically refreshed by an operation of the automatic refresh circuit. The dynamic random access memory of this arrangement does not need a special external terminal for the refresh operation and an external circuit associated therewith. Thus, the random access memory of this arrangement constructs, in effect, a pseudo static random access memory.
REFERENCES:
patent: 4005395 (1977-01-01), Fosler, Jr. et al.
patent: 4084154 (1978-04-01), Panigrahi
patent: 4238842 (1980-12-01), Aichelmann, Jr.
patent: 4549284 (1985-10-01), Ikuzaki
Hitachi , Ltd.
Popek Joseph A.
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