Dynamic MOS logic circuit without charge sharing noise

Details Dynamic MOS logic circuit without charge sharing noise Dynamic MOS logic circuit without charge sharing noise

1997-05-12

1999-12-14

Santamauro, Jon

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326121, H03K 19096

Patent

active

06002271&

ABSTRACT:
Circuitry for eliminating charge sharing noise in MOS dynamic logic circuits is described. Dynamic logic circuits having stacks of MOS devices controlling the state of a common node defining the output logic state of the circuit are susceptible to charge sharing noise. This noise ultimately arises from leakage and stray capacitances at the nodes between MOS devices in each stack which the common node must supply. The noise is eliminated by employing MOS devices associated with the MOS devices in the stacks to couple the nodes between stack MOS devices to a supply voltage until their associated stack device changes logic state. On the changing state of the associated stack device, the node charging MOS device turns off, allowing the nodes to assume states defined by the input signals to the dynamic logic circuit.

REFERENCES:
patent: 4700086 (1987-10-01), Ling et al.
patent: 5530380 (1996-06-01), Kondoh
patent: 5793228 (1998-08-01), Evans

Affiliated with

Also associated with

Rating

Dynamic MOS logic circuit without charge sharing noise does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamic MOS logic circuit without charge sharing noise, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic MOS logic circuit without charge sharing noise will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-866852