Dynamic memory with an interchangeable pair of data lines and se

Details Dynamic memory with an interchangeable pair of data lines and se Dynamic memory with an interchangeable pair of data lines and se

1980-12-22

1983-01-04

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Differential sensing

365189, 365230, G11C 1300

Patent

active

043675409

ABSTRACT:
Four adjacent data lines are divided into two pairs. A first pair of the data lines is connected to one differential sense amplifier and a second pair of the data lines is connected to another differential sense amplifier, and vice versa, depending upon from which of the four data lines information are to be read out.

REFERENCES:
patent: 4301518 (1981-11-01), Klass

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