Static information storage and retrieval – Read/write circuit – Data refresh
Reexamination Certificate
2006-04-25
2006-04-25
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Data refresh
C365S230030, C365S227000, C365S233100, C713S322000, C713S601000, C711S106000
Reexamination Certificate
active
07035155
ABSTRACT:
In a method, system and apparatus for management of dynamic memory in battery-powered devices, information is stored in dynamic memory, such as SDRAM chips. Chip partitioning minimizes the number of chips requiring power, minimum refresh rates reduce the power needed to maintain information, and a threshold for determining when to power down a battery powered device are used to maximize battery life.
REFERENCES:
patent: 5590082 (1996-12-01), Abe
patent: 5627791 (1997-05-01), Wright et al.
patent: 5881016 (1999-03-01), Kenkare et al.
patent: 5898290 (1999-04-01), Beard et al.
patent: 6216233 (2001-04-01), Baweja
patent: 6252830 (2001-06-01), Hsu
patent: 6272588 (2001-08-01), Johnston et al.
patent: 6658544 (2003-12-01), Gray
patent: 6763443 (2004-07-01), Clark et al.
Sklavos, N., and Koufopavlou, O., “Low-Power Implementation of an Encryption/Decryption System with Asynchronous Techniques,” Proceedings of the First Conference on Microelectronics, Microsystems and Nanotechnology (MMN 2000), Athens, Greece, Nov. 20-22, 2002.
Brown Cris
Minnick Mike
Stimak Marc
Daffer McDaniel LLP
Hur J. H.
Huston Charles D.
Nguyen Van Thu
Xware Technology, Inc.
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