Dynamic memory management

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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Details

C365S230030, C365S227000, C365S233100, C713S322000, C713S601000, C711S106000

Reexamination Certificate

active

07035155

ABSTRACT:
In a method, system and apparatus for management of dynamic memory in battery-powered devices, information is stored in dynamic memory, such as SDRAM chips. Chip partitioning minimizes the number of chips requiring power, minimum refresh rates reduce the power needed to maintain information, and a threshold for determining when to power down a battery powered device are used to maximize battery life.

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Sklavos, N., and Koufopavlou, O., “Low-Power Implementation of an Encryption/Decryption System with Asynchronous Techniques,” Proceedings of the First Conference on Microelectronics, Microsystems and Nanotechnology (MMN 2000), Athens, Greece, Nov. 20-22, 2002.

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