Dynamic memory cell and method of manufacturing same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S296000, C257S302000, C257S303000, C257S304000, C257S305000

Reexamination Certificate

active

07015526

ABSTRACT:
A memory device has a plurality of memory cells, wherein each memory cell has a trench capacitor formed in a semiconductor substrate and an access transistor for it. Each access transistor has a first contact region connected to an internal electrode of the trench capacitor, a second contact region to a bit line and a control electrode region, wherein the control electrode regions of neighboring access transistors are connected by a word line formed in the semiconductor substrate.

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patent: 6255684 (2001-07-01), Roesner et al.
patent: 6339239 (2002-01-01), Alsmeier et al.
patent: 6376873 (2002-04-01), Furukawa et al.
Buot, F.A., et al., “Dependence of Gate Control on the Aspect Ratio in Metal/Metal-Oxide/Metal Tunnel Transistors,” Journal of Applied Physics, vol. 84, No. 2, Jul. 15, 1998, pp. 1133-1139.
Widmann, D., et al., “Technologie hochintegrierter Schaltungen,” 2ndEd., Ch. 8.4.2, pp. 290-293.

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