Dynamic memory cell and dynamic memory

Static information storage and retrieval – Systems using particular element – Semiconductive

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365150, 365222, G11C 700

Patent

active

052629880

ABSTRACT:
A dynamic memory cell includes a first MOS transistor for data transfer connected at one end to a read/write node and having a gate connected to a transfer gate control line, a second MOS transistor having a gate connected to a first storage node on the other end side of the first MOS transistor and a gate capacitor used as a data storage capacitor, a third MOS transistor for refresh current supply connected at one end to the first storage node, and a resistor element or switching element connected between the gate of the third MOS transistor and the other end of the second MOS transistor. The cell itself has the refresh current supplying capability and it is not necessary to effect the refresh operation on the read/write node side by turning on the charge transfer transistor.

REFERENCES:
patent: 3876993 (1975-04-01), Cavanaugh
patent: 4030083 (1977-06-01), Boll
patent: 4161791 (1979-07-01), Leach
patent: 4247919 (1981-01-01), White, Jr. et al.
patent: 4352997 (1982-10-01), Raymond, Jr. et al.

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