Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering
Reexamination Certificate
2007-07-24
2007-07-24
Padmanabhan, Mano (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output data buffering
C710S053000, C710S054000, C710S055000, C710S056000, C710S057000, C711S100000
Reexamination Certificate
active
10710414
ABSTRACT:
An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.
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Bilak Mark R.
Bunce Robert M.
Parker Steven C.
Schuh Brian J.
Chen Alan S.
Greenblum & Bernstein P.L.C.
LeStrange Michael J.
Padmanabhan Mano
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