Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output addressing
Reexamination Certificate
2000-07-27
2003-09-16
Gaffin, Jeffrey (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Input/output addressing
C710S009000, C710S052000, C709S249000
Reexamination Certificate
active
06622177
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to a method and computer program device for managing the assignment of base and alias addresses for an I/O device. In particular, the present invention relates to a method and computer program device utilizing performance data to dynamically manage the allocation of parallel I/O access capabilities enabled by the assignment of base and alias I/O addresses.
2. Description of Related Art
FIG. 1
illustrates a hardware environment of a channel subsystem
2
included in a host system
4
providing communication between CPUs
6
a, b
and I/O devices
10
a, b, c
. A storage controller
8
controls access to the I/O devices
10
a, b, c
. The host system
4
communicates with the storage controller
8
via the channel subsystem
2
and subchannels
14
a, b, c
therein. The host system
4
includes CPUs
6
a, b
that contain the sequencing and processing facilities for instruction execution, interruption action, timing functions, initial program loading, and other machine-related functions. The CPUs
4
a, b
may be host systems. The I/O devices
10
a, b, c
may be comprised of printers, magnetic-tape units, direct-access-storage devices (DASDs), displays, keyboards, communications controllers, teleprocessing devices, and sensor-based equipment. The storage controller
8
regulates and controls data transfers to the I/O devices
10
a, b, c
. The storage controller
8
function may be a separate stand alone machine, such as the IBM 3990 Storage Controller, or housed within the I/O device
10
a, b, c
or within the host system
4
. In certain systems, the host system
4
may view the storage controller
8
as a multitude of separate control unit images or logical subsystems (LSSs), wherein each control unit provides access to a particular I/O device
10
a, b, c.
The CPUs
6
a, b
and the channel subsystem
2
may access a main storage
12
. Programs and data maintained in the I/O devices
10
a, b, c
such as storage drives, must be loaded into the main storage
12
before the CPUs
6
a, b
can process such programs and data. The main storage
12
may include a fast access buffer or cache. I/O operations involve the transfer of data between the main storage
12
and the I/O devices
10
a, b, c
. The channel subsystem
2
directs the flow of data between the storage controller
8
and the main storage
12
. The channel subsystem
2
relieves the CPUs
6
a, b
of handling I/O operations and permits the CPUs
6
a, b
to devote processing cycles to other operations while the channel subsystem
2
concurrently handles data transfers. In typical implementations, the CPUs
6
a, b
, the main storage
12
, and the channel subsystem
2
are all located within a single host
4
that is attached to a single storage controller
8
, such as the IBM 3990 Storage Controller.
Channel paths
12
provide data communication between the channel subsystem
2
and the storage controller
8
. The channel paths
12
may employ a parallel-transmission protocol or a serial-transmission protocol. The storage controller
8
includes control logic to physically access the I/O devices
10
a, b, c
and control data transfer. In preferred embodiments, multiple channel paths
12
may be dedicated for communication with a particular I/O device
10
a, b, c.
A subchannel
14
a, b, c
is dedicated to each I/O device
10
a, b, c
accessible to the channel subsystem
2
, i. e., there is a one-to-one relationship between subchannels
14
a, b, c
and I/O devices
10
a, b, c
. Each subchannel
14
a, b, c
consists of internal storage and includes information relating the I/O devices
10
a, b, c
to the channel subsystem
2
. The channel subsystem
2
uses the information in the subchannels
14
a, b, c
to access the I/O devices
10
a, b, c
. The subchannels
14
a, b, c
are assigned to the I/O devices
10
a, b, c
at initialization. The subchannels
14
a, b, c
maintain information such as the channel command word (CCW), channel-path identifier, device number, etc., concerning operations initiated with respect to the I/O device
10
a, b, c
represented by the subchannel
14
a, b, c
. I/O devices
10
a, b, c
that are attached to the channel subsystem
2
by multiple channel paths
12
may be accessed using any of the available channel paths
12
. An I/O device
10
a, b, c
is addressed by channel-path identifiers (CHPIDs) identifying the path to a device, subchannel numbers identifying the subchannel
14
a, b, c
associated with the device, and a device number uniquely identifying the I/O device
10
a, b, c
to the host system
4
. The IBM S/390 operating system allows for dynamic-reconnection, wherein the storage controller
8
may select any channel path
12
leading to the host system
4
when logically reconnecting to the channel subsystem
2
.
The main storage
12
includes unit control blocks (UCBs) which include information on the subchannels and I/O devices. The CPUs
6
a, b
may access the UCB information when initiating I/O operations.
The channel subsystem
2
may receive numerous I/O operations from CPUs
6
a, b
directed toward the I/O devices
10
a, b, c
. The channel subsystem
2
initiates a channel program which comprises a series of channel commands to access and perform the I/O operation requested by the host system
4
. An I/O operation toward a volume operates through the execution of a series of linked channel command words (CCW). The CCW designates the storage area associated with the operation, the action to be taken whenever transfer to or from the area is completed, and other options. A CCW command includes different fields, including: a command code that specifies the operation to be performed, e.g., write, read, read backward, control, sense, sense ID, and transfer in channel; and an address field designating a location in absolute storage, otherwise referred to as a data storage address of where the I/O operations and commands are maintained in main memory
12
, and chain command information specifying whether commands are chained together. With each chain of commands, a define extent command may be provided indicating the permissible I/O operations that may be performed and a locate record command indicating the actual I/O operation to be performed. The chain of CCW commands may operate within the defined extent range. A description of these commands is provided in the IBM publication, “IBM 3990/9390 Storage Control Reference,” IBM Document no. GA32-0274-04 (Copyright IBM, 1994, 1996), which publication is incorporated herein by reference in its entirety.
A subchannel
14
a, b, c
establishes an active allegiance for a channel path when active communication is initiated with the I/O device
10
a, b, c
on the channel path. In current systems, the subchannel
14
a, b, c
can have an active allegiance to only one channel path at a time. While a subchannel
14
a, b, c
has an active allegiance on a channel path
12
to an I/O device
10
a, b, c
, the channel subsystem
2
does not actively communicate with that device on any other channel path. Thus, there is only one path of communication, and hence one channel program, directed toward an I/O device
10
a, b, c
at a given time even though there may be multiple dynamic channel paths
12
leading to the I/O device
10
a, b, c
. Although dynamic channel pathing provides multiple paths from the channel subsystem
2
to the storage controller
8
, only one of the dynamic paths is used at a time to communicate with the I/O device
10
a, b, c
. The dynamic paths are used to provide an alternative path for reconnecting the storage controller
8
and the I/O device
10
a, b, c
to the host system
4
. In preferred embodiments, the storage controller
8
selects the path for reconnection. In the prior art, execution of a channel program for a single host system along multiple paths would likely create device-busy conditions detectable by the channel subsystem and cause unpredictable results.
Thus, with prior art servers employing the channel subsystem architecture of the IBM ESA/390 server and
Eilert Catherine K.
King Gary M.
Yocom Peter B.
Yudenfriend Harry M.
Gaffin Jeffrey
International Business Machines - Corporation
Mai RiJue
Wojnicki, Jr. Andrew J.
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