Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor
Reexamination Certificate
2007-10-16
2007-10-16
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Function of and, or, nand, nor, or not
Field-effect transistor
C326S081000, C326S086000, C326S087000, C326S095000, C326S096000, C326S097000, C326S098000, C326S112000, C326S119000
Reexamination Certificate
active
11168718
ABSTRACT:
A dynamic logical circuit having a pre-charge element separately controlled by a voltage-asymmetric clock controlled provides increased noise immunity in dynamic digital circuits. By clocking the pre-charge element with a signal having a reduced swing in the voltage direction that turns off the pre-charge element, the pre-charge element provides a small current that prevents the dynamic summing node of a gate from erroneously evaluating due to noise, and eliminates the need for a keeper device. Providing the reduced-swing asymmetric clock as a separate signal prevents performance degradation in the rest of the circuit. Specifically, the foot devices in the dynamic portion of the circuit are controlled with the full swing clock so that evaluation is not compromised by noise or slowed. Foot and pull-up devices in any static portion of the circuit are also controlled with the full-swing clock so that switching speed and leakage immunity are not affected.
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Belluomini Wendy Ann
Montoye Robert Kevin
Saha Aniket Mukul
Harris Andrew M.
International Business Machines - Corporation
Mitch Harris Atty at Law, LLC
Salys Casimer K.
Tan Vibol
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