Dynamic logic circuit with device to prevent contention...

Details Dynamic logic circuit with device to prevent contention... Dynamic logic circuit with device to prevent contention...

2011-07-12

2011-07-12

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S095000, C365S203000, C365S230020, C365S189020

Reexamination Certificate

active

07977977

ABSTRACT:
A circuit including is disclosed. The circuit includes a precharge circuit configured to pull a dynamic node toward a voltage present on the voltage supply node during a precharge phase, and an evaluation circuit configured to, during an evaluation phase, pull the dynamic node toward a ground voltage responsive to a first input condition and configured to inhibit pulling of the dynamic node down responsive to a second input condition. A pull-up circuit coupled between the first dynamic node and the voltage supply node includes first and second pull-up transistors. The first pull-up transistor is configured to activate responsive to the precharge phase. The second pull-up transistor is configured to activate at a delay time subsequent to entry of the evaluation phase. When the first and second pull-up transistors are active, a pull-up path is provided between the dynamic node and the voltage supply node.

REFERENCES:
patent: 6552949 (2003-04-01), Silla et al.
patent: 6794901 (2004-09-01), Bernstein et al.
patent: 6894528 (2005-05-01), Gauthier et al.
patent: 6914452 (2005-07-01), Gauthier et al.
patent: 7034576 (2006-04-01), Levy et al.
patent: 7109757 (2006-09-01), Yuan et al.
patent: 7209394 (2007-04-01), Dankert et al.
patent: 7256621 (2007-08-01), Lih et al.
patent: 7598774 (2009-10-01), Belluomini et al.
patent: 7679403 (2010-03-01), Erstad
patent: 2008/0250289 (2008-10-01), Gloekler et al.
patent: 2008/0298143 (2008-12-01), Chen et al.
patent: 2009/0175107 (2009-07-01), Christensen et al.

Affiliated with

Also associated with

Rating

Dynamic logic circuit with device to prevent contention... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dynamic logic circuit with device to prevent contention..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic logic circuit with device to prevent contention... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2673628