Dynamic logic circuit with bitline repeater circuit

Details Dynamic logic circuit with bitline repeater circuit Dynamic logic circuit with bitline repeater circuit

1999-01-19

2000-07-04

Nelms, David

Static information storage and retrieval

Read/write circuit

Accelerating charge or discharge

365227, G11C 700

Patent

active

060848103

ABSTRACT:
A dynamic logic circuit is provided. The dynamic logic circuit includes at least one bitline. At least one repeater circuit is inserted into each bitline. The bitline repeater circuit includes an inverter and at least one transistor. The inverter is activated by the bitline starting to discharge and the activated inverter turns on the bitline repeater circuit transistor which discharges the bitline. The dynamic logic circuit including the bitline repeater circuit provides improved performance and decreased power consumption.

REFERENCES:
patent: 5440182 (1995-08-01), Dobbelaere
patent: 5455521 (1995-10-01), Dobbelaere
patent: 5576649 (1996-11-01), Foss
patent: 5724304 (1998-03-01), Foss
patent: 5768186 (1998-06-01), Ma
patent: 5774411 (1998-06-01), Hsieh et al.
"Principles of CMOS VLSI Design, A Systems Perspective", by Neil H. E. Weste and Kamran Eshraghian, 1993, pp. 301-302, and 308-310.

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