Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-10-26
2008-11-04
Auve, Glenn A (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S301000, C710S302000
Reexamination Certificate
active
07447824
ABSTRACT:
A dynamic lane management system comprises at least one downstream device of a computer system configured to dynamically initiate a lane width re-negotiation operation with at least one upstream device of the computer system in response to a detection of at least one power-related event associated with the computer system.
REFERENCES:
patent: 6138194 (2000-10-01), Klein et al.
patent: 6590432 (2003-07-01), Wu et al.
patent: 7136953 (2006-11-01), Bisson et al.
patent: 2004/0088469 (2004-05-01), Levy
patent: 2004/0103333 (2004-05-01), Martwick et al.
patent: 2005/0206345 (2005-09-01), Maskatia et al.
patent: 2005/0283561 (2005-12-01), Lee et al.
patent: 2006/0023633 (2006-02-01), Caruk et al.
patent: 2007/0067548 (2007-03-01), Juenger
patent: 2007/0094436 (2007-04-01), Keown et al.
Chen Qijun
Jabori Monji G.
Lakdawala Rahul V.
Auve Glenn A
Hewlett--Packard Development Company, L.P.
LandOfFree
Dynamic lane management system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dynamic lane management system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dynamic lane management system and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4031906