Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller
Reexamination Certificate
1999-02-25
2003-12-02
Tung, Kee M. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Graphic display memory controller
C345S545000, C713S320000, C713S324000, C365S227000, C365S229000
Reexamination Certificate
active
06657634
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to circuits and methods for reducing power consumption for electronic circuits, and more particularly to circuits and methods that control a memory clock and/or memory controller to reduce power consumption.
BACKGROUND OF THE INVENTION
Portable electronic devices such as notebook computers, personal organizers, portable telecommunication equipment and other electronic devices consume much power during their display mode. By way of example, graphics control chips for laptop computers may be integrated circuits having synchronous dynamic RAM (SDRAM) on the same die as the memory controller and other video and graphics processors. For example, a conventional type of graphics control chip may include a number of memory access request circuits (or access request engines) such as a video capture engine, a two dimensional and three dimensional drawing engine, a display engine, a video playback engine, a host processor, onboard SDRAM, SGRAM or other RAM serving as the frame buffer memory, a memory controller and a phase lock loop circuit (PLL) for generating a memory clock. As known in the art, each engine may have another clock, other than the memory clock, such as from another PLL or external clock, creating a clock boundary. Graphics control chips typically also include another phase lock loop circuit for generating a clock for a display device (or devices) such as a CRT that may plug into the laptop computer or an LCD display that is mounted to the laptop computer. A central processing unit (CPU) of the computer interfaces with the graphics chip and other peripheral devices as known in the art. A laptop computer or a portable device may include a TV tuner or video decoder, as part of a multimedia package, that sends video information to the video capture engine for eventual display on the LCD display after being stored in the memory.
With chips such as graphics controller chips, the many graphic engines attempt to access the memory to perform their necessary operations. However, only one of the graphic engines can typically access the memory at a given time. In addition, multiple memory controllers may be configured to access different portions of memory at the same time. Some of the display operations require real-time processing, such as video capture operation, display operation and video playback, so that real-time display can occur on the LCD display. For example, where the TV tuner is applying video to the video capture engine, the video should be processed in real-time to facilitate display in real-time which is necessary, for example, for live performances or when the TV tuner is providing live feed. Hence, this engine has a higher priority over, for example, a 2D or 3D drawing engine which may be slightly delayed and still provide the user with high performance on display times.
A problem arises with such devices since power consumption and thermal dissipation need to be minimized for portable devices without unnecessarily sacrificing operational performance. The power dissipation of a graphics control chip and other integrated circuits is typically related to the operational activity of memory. Conventional portable display systems typically have power management systems that generate system level standby/suspend commands. During system level standby/suspend modes, graphics controller subsystems and other subsystems may typically respond by forcing the frame buffer memory into a low power self refresh mode for the duration of the system level standby/suspend mode. This may be done for example by pulling a memory clock enable line low and other suitable pins to put the memory in a self refresh mode. The synchronous memories are designed to switch into energy savings modes based on the level of the memory clock enable signal.
FIG. 1
shows, by way of example, a block diagram of a portable display system, such as a laptop computer, a handheld processing device, telecommunication device or any other suitable portable display device, that generates graphics and/or video display information to a display device and employs system level standby/suspend power management control. When the display system is a laptop computer, such systems typically include an operating system
10
that operates under control of a central processing unit, for example, and a power management control system
12
which then generates a suspend/standby command
14
to a memory controller
16
. The memory controller
16
then generates a clock enable/disable signal
18
to, for example, control a memory clock enable pin (and/or other pins) on a graphics memory device
20
to put the synchronous memory in a self refresh mode during the system level standby/suspend mode (e.g., the inactive mode). The graphics memory device
20
may be, for example, an SDAM, SGRAM or any other suitable graphics and/or video memory device. The operating system
10
generates a suspend/standby command
22
when, for example, the laptop computer is in a standby/suspend mode as activated through a graphic user interface or software controlled timer. Accordingly, such systems can reduce the power of the graphic subsystem which includes the synchronous memories used for frame buffer operations. A clock enable signal
18
is typically the memory clock enable
10
on the memory device
20
. This control typically only puts the SGRAM or memory device in a low power mode when the graphic system is completely idle. When the operating system
10
indicates that the display is in the active mode (e.g., the display is enabled), the memories are typically always enabled.
As such, video and/or graphics memories are controlled through a memory clock enable signal to effectively power down the memory during operating system controlled suspend/standby conditions, such as when the display is disabled. However, such systems do not typically provide power reduction for frame buffer memory during the active operational mode of the system. As such, various memory request engines
24
a
through
24
n
, although in the active mode, may not be generating memory requests to memory controller
16
. Hence, memory
20
will have its clock enable active and thereby will unnecessarily consume power. Conventional, portable display systems typically, in a static screen display mode for example, still keep the memory
20
in the active mode. With ever increasing power demands of portable display systems due to increased functionality that is continually being added, power consumption reduction becomes an increasingly important requirement to save battery life of the portable display device and need to meet subsystem thermal requirements that become increasingly important as larger density circuits are needed.
Consequently, there exists a need for a dynamic power reduction circuit that can reduce power consumption and power dissipation without unnecessarily degrading system performance during active system modes. It would be advantageous, if such a system could detect memory access demand and automatically adjust memory operation accordingly to facilitate power reduction.
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Sinclair David E.
Young Eric
ATI International SRL
Tung Kee M.
Vedder Price Kaufman & Kammholz P.C.
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