Dynamic deep depletion field effect transistor

Details Dynamic deep depletion field effect transistor Dynamic deep depletion field effect transistor

2005-07-14

2008-12-09

Wojciechowicz, Edward (Department: 2895)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S330000, C257S331000

Reexamination Certificate

active

07462908

ABSTRACT:
A vertical conduction trench FET has a plurality of trenches containing conductive polysilicon gates. The mesas between the trenches have a source diffusion region connected to a common source electrode. The trenches are spaced so that the depletion regions induced by the trench gate will overlap to pinch off conduction through the mesa to turn off the device. The gate potential is pulsed. The polysilicon in the trenches may be separated into two insulated portions. The pulses may be applied simultaneously or sequentially to the polysilicon gates.

REFERENCES:
patent: 2002/0102795 (2002-08-01), Calafut
patent: 2005/0167742 (2005-08-01), Challa et al.
patent: 2005/0199918 (2005-09-01), Calafut et al.
patent: 2006/0261405 (2006-11-01), Forbes

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