Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2006-03-07
2006-03-07
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S206000, C711S103000
Reexamination Certificate
active
07010662
ABSTRACT:
One or more secondary data structures are maintained containing mappings of logical flash memory addresses to physical flash memory addresses. Each secondary data structure has a predetermined capacity of mappings. A master data structure is also maintained containing a pointer to each of the one or more secondary data structures. Additional secondary data structures are allocated as needed to provide capacity for additional mappings. One or more counters associated with each of the one or more secondary data structures, respectively, provides an indication of when each of the one or more secondary data structures reaches the predetermined capacity of mappings.
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Aasheim Jered Donald
Kalkman John
Yang Yongqi
Lee & Hayes PLLC
Microsoft Corporation
Peikari B. James
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