Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2006-03-07
2006-03-07
Tsui, Carol S. W. (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C438S014000, C382S145000, C324S765010, C716S030000
Reexamination Certificate
active
07010451
ABSTRACT:
Methods, systems, and apparatuses provide dynamic creation and modification of wafer test maps. Test plans are defined for a testing session of a wafer lot. The test plan is associated with a number of seed map patterns. During a wafer lot testing session, test results are dynamically obtained and examined at run-time of a test. Moreover, the seed map patterns are overlaid on the test sites defined in the test plan. If the test result statistics are outside of defined threshold tolerance levels, then a new wafer test map is created or modified at run-time, according to corresponding seed map patterns. If seed map patterns are within the intersection of valid test sites, then seed map patterns are created at run-time.
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Dorough Michael J.
Gravelle Robert M.
Velichko Sergey A.
Kim Paul
Micro)n Technology, Inc.
Schwegman Lundberg Woessner & Kluth P.A.
Tsui Carol S. W.
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